This note shows that measuring a digital signal’s risetimes and falltimes does not require multi-GHz oscilloscopes; with imagination, very cheap test equipment is sufficient. Measurements show that even common-or-garden 74LVC gates can have 10%-90% transition times of around 625ps.
Why Is The Transition Time Important?
Correct functioning of digital systems requires that the digital signals transmitted from one component to another are valid digital signals. In particular:
- the voltage levels must be correct; the static voltage levels are easily specified in device datasheets, and can easily be measured
- there must be good “signal integrity” which implies a monotonic transition without overshoot between valid logic levels. Transitions cannot be determined from device datasheets since they critically depends the detailed PCB layout and construction. Poor signal integrity leads to pattern sensitivity and intermittent failures. It can be difficult to measure transitions due to the high bandwidths and the loading effects of measurement probes
Modern 74-series digital logic is capable of high bit rates above a few hundred Mb/s. It is widely understood that such systems require PCB construction and layout following “good RF practices” e.g. constant impedance transmission lines which are correctly terminated. It is sometimes presumed that if the bit rate of a digital signal is low (say up to low Mb/s), then there is will be no high-frequency problems good RF practices can be ignored. That is incorrect since problems occur at signal transitions, however often those transitions do or don’t occur. From an RF perspective, the maximum frequencies present in a digital signal depend only on how fast signals change, i.e. on the “transition time” or “edge rate”, not on how often the signals change.
Hence a digital signal’s transition time, measured in nanoseconds, is the key factor in ensuring good signal integrity. The transition time directly determines the maximum interconnect length that does not require controlled-impedance PCB tracks; for more information see Howard Johnson’s classic “Black Magic” book or Bogatin’s Rules of Thumb especially numbers 1, 3, 18 and 26. Unfortunately transition times are usually omitted from device data sheets, and so have to be guessed or (preferably) measured. Directly measuring the transition time of modern logic families with an oscilloscope requires expensive multi-GHz oscilloscopes. Fortunately, with a little imagination, that is not necessary: a £32/$48 RTL SDR dongle and noise generator are sufficient.
On pages 2 and 3 of Johnson’s “High-speed Digital Design, A Handbook of Black Magic“, Johnson defines that the relationship of the 10%-90% transition time and the “knee frequency” is . If a digital signal is driven by a pseudo-random binary sequence (PRBS), then the knee frequency can be determined thus:
Johnson’s diagrams show dBV, the slope below the knee is 20dB/decade, and is defined to be at 6.8dB below that slope. These measurements are in dB, the slope is 10dB/decade and is at 3.4dB below that slope.
The device under test (DUT) was a parallel combination of three 74LVC1G14 gates each with its own 120Ω series termination resistor, with a 5V supply. The output impedance of the combination was approximately 50Ω, which matched the coax cables and measuring equipment. The spectrum was measured in the same way as RF filters were characterised.
Using Johnson’s method directly and driving the DUT with a PRBS clocked at 25MHz leads to disappointingly messy results:
The straight black lines are vaguely plausible eyeballed representations of the slope and knee frequency. is ~800MHz, corresponding to a of 625ps.
However, we can do much better than that. The key is that the PRBS is merely an imperfect simulation of a random signal. If a random signal is used then there should be no “sinc lobes” and no spurs.
Thus the alternative method is to use a noise-source to drive the DUT. The input to the DUT is a 50Ω termination such that the gate’s input is DC biassed to halfway between and . When the noise is superimposed on the DC bias, the output frequently flips between high and low. It is not necessary for the outputs to be equally high and low, since only the transitions are important. Hence the DC bias level is not particularly critical; 82Ω to ground plus 120Ω to +5V were used.
The resulting spectrum is much cleaner and easier to interpret:
is also at 800MHz, again corresponding to a 625ps transition time – which is surprisingly close the value found with the PRBS method.
The trace below shows the risetime using a 350MHz Tektronix 485 oscilloscope, which therefore has a nominal risetime of 1ns. The trace below is at 1ns/div and shows a ristime of marginally under 1ns; hence the signal generator’s risetime is significantly less than 1ns
The ripple is in the region of 500MHz-750MHz. It is quite possibly an artefact of the scope, which has not been adjusted recently.